Basics of PIC (Architecture and Features)


In previous article, we have understood various families of PIC controller. Architecture of micro-controller plays an important role for its operation and performance. In this tutorial, we will learn about the architecture of PIC controller. We will consider PIC18F46K22 micro-controller to learn the basics. We will also cover features and specifications of the same controller here.

Architecture

Micro-controller architecture can be classified in two ways.

Based on number of instruction

CISC (Complex Instruction Set Computing)

In early days of microprocessor or microcontroller era, programming was done in assembly language and memory chips were expensive. Thus it was a common practice for a designed to make instructions to perform as much work as possible. In CISC, complex instructions are there which can perform varieties of operations in a single step reducing memory requirements of program memory.

RISC (Reduced Instruction Set Computing)

This concept introduces instructions to perform general purpose applications instead of a specific application in case of CISC. In RISC, any task is a combination of several general purpose instructions. This reduces number of instructions required but increases memory requirement. This architecture incorporates simple instructions, few data types and simple addressing modes. At present, RISC is widely used for new age controllers.

Based on memory architecture

Von Neuman

In this architecture, program and data are stored in a same memory. ALU can access this memory to execute the set of instructions stored in it. Data on which operation has to be performed are also stored in this. Same memory is used to store results also. Thus the memory plays a vital role in system. However the speed is a limiting factor here because the data of memory and program is accessed one after one. Thus present era controllers does not find it suitable.

Harvard

Harvard architecture has separate program and data memory which enables the system to operate at a faster speed. Because of separate program and data memory, ALU can access both of them simultaneously which can yield faster execution of instructions.

PIC Architecture

PIC controller has Harvard architecture with RISC which makes it easy to program along with speedy execution. PIC controller has 8 bit architecture along with 16 bit instruction set. Here meaning of 8 bit architecture means CPU core can transmit or receive 8 bit data at a time however instruction set are of 16 bit. So users should not get confused here between 8 and 16 bit.

PIC micro-controller contains 8 bit registers and ALU. Different GPRs (general purpose registers) and SFRs (special function registers) are available in PIC. Instructions can perform various operations using one or two operands. One operand is stored in WREG (Accumulator) while other one can be stored in GPR or SFR depending on addressing mode.

Pictorial representation of architecture for PIC controller is as shown below.

PIC Architecture

PIC Architecture

PIC controller has unique feature of pipe-lining which improves the operating speed of system. We will discuss about pipe-lining later on.

Now to understand basic features of PIC, we will consider PIC18F46K22 micro-controller.

Features of PIC18F46K22

High-Performance RISC CPU:

  • C Compiler Optimized Architecture:

- Optional extended instruction set designed to optimize re-entrant code

  • Up to 1024 Bytes Data EEPROM
  • Up to 64 Kbytes Linear Program Memory Addressing
  • Up to 3896 Bytes Linear Data Memory Addressing
  • Up to 16 MIPS Operation
  • 16-bit Wide Instructions, 8-bit Wide Data Path
  • Priority Levels for Interrupts
  • 31-Level, Software Accessible Hardware Stack
  • 8 x 8 Single-Cycle Hardware Multiplier

Flexible Oscillator Structure:

  • Precision 16 MHz Internal Oscillator Block:

- Factory calibrated to ± 1%

- Selectable frequencies, 31 kHz to 16 MHz

- 64 MHz performance available using PLL – no external components required

  • Four Crystal modes up to 64 MHz
  • Two External Clock modes up to 64 MHz
  • 4X Phase Lock Loop (PLL)
  • Secondary Oscillator using Timer1 @ 32 kHz
  • Fail-Safe Clock Monitor: - Allows for safe shutdown if peripheral clock stops

- Two-Speed Oscillator Start-up

Analog Features:

  • Analog-to-Digital Converter (ADC) module:

- 10-bit resolution, up to 30 external channels

- Auto-acquisition capability

- Conversion available during Sleep

- Fixed Voltage Reference (FVR) channel

- Independent input multiplexing

  • Analog Comparator module:

- Two rail-to-rail analog comparators

- Independent input multiplexing

  • Digital-to-Analog Converter (DAC) module:

- Fixed Voltage Reference (FVR) with 1.024V,

2.048V and 4.096V output levels

- 5-bit rail-to-rail resistive DAC with positive and negative reference selection

  • Charge Time Measurement Unit (CTMU) module:

- Supports capacitive touch sensing for touch screens and capacitive switches

Extreme Low-Power Management

PIC18(L)F2X/4XK22 with XLP:

  • Sleep mode: 20 nA, typical
  • Watchdog Timer: 300 nA, typical
  • Timer1 Oscillator: 800 nA @ 32 kHz
  • Peripheral Module Disable

Special Micro-controller Features:

  • 2.3V to 5.5V Operation – PIC18FXXK22 devices
  • 1.8V to 3.6V Operation – PIC18LFXXK22 devices
  • Self-Programmable under Software Control
  • High/Low-Voltage Detection (HLVD) module:

- Programmable 16-Level

- Interrupt on High/Low-Voltage Detection

  • Programmable Brown-out Reset (BOR):

- With software enable option

- Configurable shutdown in Sleep

  • Extended Watchdog Timer (WDT):

- Programmable period from 4 ms to 131s

  • In-Circuit Serial Programming™ (ICSP™):

- Single-Supply 3V

  • In-Circuit Debug (ICD)

Peripheral Highlights:

  • Up to 35 I/O Pins plus 1 Input-Only Pin:

- High-Current Sink/Source 25 mA/25 mA

- Three programmable external interrupts

- Four programmable interrupt-on-change

- Nine programmable weak pull-ups

- Programmable slew rate

  • SR Latch:

- Multiple Set/Reset input options

  • Two Capture/Compare/PWM (CCP) modules
  • Three Enhanced CCP (ECCP) modules:

- One, two or four PWM outputs

- Selectable polarity

- Programmable dead time

- Auto-Shutdown and Auto-Restart

- PWM steering

  • Two Master Synchronous Serial Port (MSSP) modules:

- 3-wire SPI (supports all 4 modes)

- I2C™ Master and Slave modes with address mask

 

We will study about all the features one by one. Keep visiting the site for the further updates.

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